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ITC544 Computer Organisation And Architecture

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ITC544 Computer Organisation And Architecture

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ITC544 Computer Organisation And Architecture

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Course Code: ITC544
University: Charles Sturt University

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Country: Australia

Questions:
a) Construct the XOR operator using only AND, OR and NOT gates. b) Charles Sturt University (CSU) is conducting three sessions every year. The session 1 is from 1st of March to end of June. Session 2 is from 1st of July to end of October and session 3 is from 1st of November to end of February. The student can enrol three subjects every session. Write a Boolean function and design a logic circuit, use of basic logic gates to show what the available subjects are in these time frames.111111
Answer:
1. 122 instructions imply that 2^7, hence 7 bits are required for the opcode.2. The number of bits in a word is 16. Hence the address part is 16 – 7 = 9 bits.3. Maximum allowable size of the memory is 2^9 bits.4. 2 ^16 – 1 or 16 ones is the highest number to be allocated in the memory.
Immediate Addressing mode
Value added into the accumulator is 1000.
Value in accumulator is 500.
Therefore, the value loaded into the accumulator is 1000 +500 =1500.

Direct Addressing mode

Effective address: 1000
Value added into the accumulator is 1400.
Value in accumulator is 500.
Therefore, the value loaded into the accumulator is 1400 +500 = 1900.

Indirect Addressing mode

The effective address is the value in 1000 which is 1400.
Therefore, the value added into the accumulator is 1300
Value in accumulator is 500.
Therefore, the value loaded into the accumulator is 1300 +500 = 1800.

Indexed Addressing mode

The value of R1 is 200.
The effective address is 1000 + 200 = 1200. Hence the value in 1200 location would be added to the accumulator.
Value in location 1200 is 1000. Hence the value loaded into the accumulator is 1000 + 500 = 1500.
The following MARIE program can be utilized to realise the expression S = (A+B)-(C+D).
100 LOAD A
101 ADD B
102 STORE X
103 CLEAR
104 LOAD C
105 ADD D
106 STORE Y
107 CLEAR
108 LOAD X
109 SUBT Y
10A STORE S
10B HALT
Now for the Register memories the following program is to be used:
ADD R1, A, B
ADD R2, C, D
SUBT A, R1, R2
Hence for the first program the system would be required to store the results in three addresses and for the second program would require only a single memory unit for storing the data.
a.

Address

Hex

 

 

100

1108

Start

LOAD A

101

3109

 

ADD B

102

210B

 

STORE D

103

A000

 

CLEAR

104

F400

 

OUTPUT

105

B10B

 

ADDI D

106

2014

 

STORE B

107

7000

 

HALT

108

0200

A

HEX 00FC

109

0014

B

DEC 14

10A

0001

C

HEX 0108

10B

0000

D

HEX 0000

b.

Symbol

Location

A

108

B

109

C

10A

D

10B

Start

100

When the program terminates the accumulator would store the value 10A in hex.

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